The present invention relates to integrated circuits and, in particular, to an integrated circuit having a unified memory architecture.
Unified memory architectures have been used for various computer applications, such as network computers, Internet appliances and mission specific terminal applications. In a typical unified memory architecture, all devices requiring access to memory are coupled to a common system bus. These devices can include a processor, an input-output device or a graphics device, for example. A memory controller arbitrates access to memory between the various devices.
Memory latency is a common difficulty in unified memory architectures since each device must arbitrate for access to memory over the system bus. Latency can be reduced by requesting bursts of data from memory. For example, graphics devices may request bursts of display data from a frame buffer. Since graphics devices continually supply data to a screen display, these devices have a high bandwidth requirement and cannot easily accommodate long memory latencies. On the other hand, processors typically request specific data from memory or another device and then wait for the data without giving up access to the system bus. Also, processors require a relatively high priority. This often results in contention for the system bus between the processor and devices having high bandwidth requirements.
A conventional system with multiple bus masters uses an address bus and a data bus to control the memory system. Typically, both of these busses are arbitrated for and granted to one master at a time. Many cycles of bus time are lost due to dead time between masters, and time required for each master to communicate its data request to the memory controller. In addition, the processor uses the same bus for doing "program Input/Output" functions, which are very inefficient in terms of bus utilization.
A typical system that includes a raster scan display output for graphics uses a second memory system for this time critical function. Not only does this extra memory system increases cost, but the overall performance of the system is impacted due to the need for the data to be copied from processor memory space into the display memory space.